Thursday, 16 November 2017



The first time I saw a Commodore 64 emulator running on a PC was 17 years ago. Immediately when I saw it, I have wondered how it worked and had the desire to write my own.

This desire slumbered for years, until late 2015 when I scarped together the courage to write one in Java.

The following year I wrote one in JavaScript and then in Android.

I finished off the Android emulator in January 2017 and since then months has past since I played with 8-bit emulators.

Seven months later, though, I started contemplating with a new idea: A complete C64 system on a FPGA.

Before I continue the story, let just stand still a moment at the term FPGA, for those that is not quite familiar the term.

FPGA is the acronym for Field Programmable Gate Array. It is basically a chip containing a bank of logic gates and/or functional blocks which you can connect together to form a function you desire. Typical functions that you can implement in an FPGA include graphic acceleration and digital signal processing.

The nice thing about an FPGA is that you can reconfigure it.

Anyway, back to the main story.

I had a look on the net to see if there is any current C64 on FPGA implementations and couldn't really find any. The closest I could find was 6502 oriented systems, connected via a serial interface.

These serial interface implementations is nice if you want to play around with legacy BASIC, but without fancy graphics!

This was one of the main reasons I wanted to start writing my own C64 implementation on a FPGA.

Which FPGA Development Board?

The big question is which FPGA Development board will be most fit for the purpose of a complete C64 System?

Probably the most important feature for this is having some kind of video output for the graphics.

One FPGA development board that fits this need is the Basys 3 board from Digilent, which features a VGA port:

I had a lot of fun with this board until I read more on how LCD VGA monitors work. I ended up with the question on how to interface a PAL/NTSC signal with a LCD monitor with an odd resolution of 1366x768 and maintaining the aspect ratio. Not an easy question to answer, at least not with some kind of framebuffering.

The only resource the Basys 3 have available for framebuffering is on FPGA Block-RAM, which will give you a couple of screen line buffering. Then you would also need to reserve some Block RAM space for 64KB of C64 RAM, and the three ROMS of the C64 system.

This all adds up to a very tight Block RAM budget, and this board doesn't provide us with the luxury of a couple of Megs of SDRAM.

I needed a board that would give me some more breathing space.

After some more research, I found the ZYBO board, also from Diligent:

This board features an FPGA with similar capabilities as the Basys 3, and a 512MB of onboard SDRAM.

The added SDRAM will surely provide some helping should we be running out of Block RAM resources.

The ZYBO board will be indeed be the board I will be using through this BLOG series.

More on the ZYBO board

The most interesting part of the ZYBO board is the FPGA chip itself.

The FPGA chip is a ZYNQ. This is basically a dual ARM Cortex  core, together with the FPGA as shown in the following block diagram from the Diligent website:

The FPGA part is represented via the yellow block at the bottom.

As you can see from the diagram, the FPGA also have access to the diagram via AXI ports, which is a protocol defined ARM Holdings.

When you write a program to run on the ARM Cortex processor, you also have access to design in the FPGA fabric via memory mapped registers. I will discuss this in more detail in a future post.

The fact that you the ARM core can "see" your FPGA design, means that you can also harness the ARM core to assist in debugging your FPGA core. This makes live a bit simpler by not having you to add extra debugging cores in FPGA design.


This Blog series I will also approach in an incremental fashion. Starting with something simple and gradually evolving it.

I will be building on the 6502 core written by Arlet Ottens, available on Github.

Arlet Ottens have done some excellent work on writing a 6502 core that can run on an FPGA  having Block RAMS.

Block RAMS work a bit different than the RAM you used to get in a C64.  In C64 when you asserted the Read line and address on the memory bus, there was a small time period when the data on the databus was in a uncertain state.

Granted that this uncertain period was a disadvantage, on the other hand if you keep your clock period longer than this uncertain period, it can actually simplify your CPU design! I mean, if you a assert your lines now, you can have your data in the next clock transition!

With Block RAM however, you need to wait an extra full clock cycle for your data, from asserting the lines on the bus before you get your data.

This extra cycle in between causes that you cannot use a direct 6502 implementation as is.

Arlet had to jump through a couple of hoops to get a 6502 implementation working with Block RAMS.

Another 6502 project I will be leveraging from, is the 6502 Test Suite developed by Klaus Dormann to verify that my FPGA implementation is sound.

The Test Suite developed by Klaus Dormann is very comprehensive. Should a 6502 device or emulator pass all the tests, you are almost guaranteed that you have a sound 6502 implementation. 

So in short. In the next post I will be running Arlet Ottens's core in simulation with the 6502 Test Suite developed by Klaus Dormann.

Once convinced that Klaus Dormann's 6502 Test Suite ran successfully, I will be adding parts to the FPGA on the way to a full C64 implementation.

In Summary

This post was an introduction to my new series of Blog posts regarding the creation of a Complete C64 system on an FPGA.

The FPGA board I will be using throughout the series will be a ZYBO from Digilent.

In the next post I will be running Klaus Dormann's 6502 Test Suite on Arlet Otten's 6502 core in a Verilog simulation.

Till next time!


  1. First of all I want to thank you so much for these articles. I was looking for a "C64 in FPGA" project and I found these beautiful lessons that drive me step by step learning the FPGA programming with a really cool project for people like me who loved C64 (and VIC20) when they was kid...
    I have just a question (for now, maybe more will come as long as I'll go through your posts): I've seen that ZYBO board is not so cheap. Do you think your project can be converted to run on a spartan-6 demo board (with VGA and SDRAM) like this one:
    or this one:

    Thank you again.

    1. Agreed, the Zybo board is kind of expensive. I had a look at the first link you send and it indeed looks like a cool board.

      I am sure it will most probably work with the c64 modules.

      Only problem I foresee is with the glue logic. The Zynq interface with the SDRAM via the AXI protocol. The board, from Aliexpress, however, appears to be interfacing with SDRAM more directly. From the datasheet of the FPGA I see that a IP block is provided for interfacing with DDR. So it will be a case of getting the DDR block to work and then applying it to the design.

      Also important to see that enough block ram resources is provided to accomodate all C64 RAM/ROMS. If this is not the case gou ight need to find a way to harness SDRAM for this purpose.

      Finally, you should cinsidet how to interface a keyboard with this baord. Not sure how easy it is to intercafe this board with a usb keyboard

  2. Thank you for your answer. I know it will be difficult to interface to USB keyboard (typically these boards have the usb port connected to a CP2102 or similiar just to have a serial connection for debug). Anyway, I think I will order the board and have a try. I will learn something in any case.
    Thank you again for this blog.

    1. You're welcome.

      Just on the boards on the Ali express website. I see no datsheet for download for the board itself. Usually for such boards a datasheet is provided for download, just so one can know which pin of the FPGA correspond to other pins of pheripherals in the board.

      So I am just curious to know if this info will be provided with the delivery.

    2. Yes, I've asked the seller to provide me schematics and other stuff before buying. I've already received it for the "second link" one, still waiting for the first one...

  3. This is gold! Thank you for taking the time to document and publish all this.

    I've embarked on a similar journey, but with a different board so I can't follow your steps verbatim. Looks like I have some catching up to do :)

    I'm hoping I'll get to a point where I can contribute something useful.

    Anyways, keep it up! (please :)

    1. Glad to hear that the series of blogs inspired you to start a project of your own.

      When you start FPGA programming, it feels indeed like a steep learning curve, but as with a lot of things try to conquer it bit by bit.

      Most important: Don't give up!

      It would be nice to hear your and other people's experiences when trying to get C64 FPGA project running.

  4. Hi Johan (hoi Johan :))

    I very much liked your extensive C64/FPGA work on your blogspot.
    I started out with the introduction ( ) but soon it became something that was a little bit out of my league... ;)

    But that being said, I do want to get familiar with FPGA. I found a little board ( ) on Internet to get me acquainted with FPGA. I haven't bought it yet, but in your experience what are the min. specs of the FPGA needed to run C64 BASIC (kernal rom + basic rom + chargen rom)?

    With kind regards / hartelijke groetjes,
    Jeroen Wolf, from the Netherlands

    1. Hi Jeroen!

      Glad to hear that my Posts motivated you to start experimenting with FPGA's :-)

      I had a look at the link you provided of the TinyFPGA. The limiting factor here would be the Block RAM, which in this case is 128 KBit block RAM (e.g. around 12KByte).

      To run C64 Basic, you would require about 82KB of Block RAM. If you would like to render to a VGA display, you would probably need an addtional 1KB or 2KB of Block RAM to buffer the frames lines produced by the VIC-II module.

      Having said that, I saw some interesting projects for the TinyFPGA at this website:

      One of the most notable projects mentioned on this website is an Apple I Computer Recreation, which was also 6502 CPU based.

      Anyway, I hope you enjoy your voyage with FPGA's.

      Groete hier uit Suid-Afrika.

  5. Hi Johan, thx so much for your extensive answer. TinyFPGA is working on another board (that's almost available, well I hope ;)) the TinyFPGA EX. This board feature 24288 logic cells and 1008 kbit (= 126 Kb) Block RAM. Do you think that should be sufficient? I like the way TinyFPGA works. Is there, with the end goal in mind, any more things that are important to keep in mind?

    I am eager to start with the basic concepts of FPGA and then work further, following your posts. I hope this board will get me all the way (in the end).

    All the best Johan and it was a pleasure to read your complete (well almost complete ;)) blog. Now my goal is to understand what is what and how things work.

    I have experience in PHP and JAVA, but I think this is a whole other mind set.

    With kind regards, Jeroen.

  6. Another thing that triggered my mind was latency issues. Before exploring/reading up on FPGA I've tried lots of Linux distro's in combination with several Raspberry Pi's (eg emulation). The best emulator for the Pi 3 (I think) was/is BMC64.

    it runs a 'native' version of VICE. Do no long wait for a complex linux distro to boot up. 4.1 sec to boot and a Total lag of 'only' 4-5 frames compositie video and 90ms audio.

    Compared to your initial findings what would be the performance benefits when using/compared to FPGA?

    Well that's it. In Holland it's now bed time ;) gotta go to work tomorow :)

    Grts, Jeroen

    1. Hi Jeroen

      The TinyFPGA looks like quite a nifty board. The Block RAM should be more than enough, and you should have some spare for video signal generation.

      The number of logic elements should also be more than enough.

      Another exciting feature of this board is the presence of 64Mbit HyperRAM. This would come handy store tape images (e.g. .TAP files) so that your C64 can load games. These .TAP file images can be in the region of 500KB, which is out of the range of the Block RAM of the FPGA.

      It might be a slight learning curve to master the HyperRAM, but I am sure the board manufacturer might provide some handy tutorials to get you started.

      One thing though I cannot comment on is how you would get a video signal out of this particular board. You could probably hook up the User IO pins to a HDMI port. There is also a couple of tutorials out there that will provide a HDMI module.

      With Java and PHP it shouldn't be too difficult to get into FPGA programming. I also come from a Java/Delphi background, and it is only the last year or two that I started to play with FPGA programming.

      There are some subtle differences from conventional programming languages though. Where conventional languages are more of a serial nature, FPGA programming you can have assignments that happens in parallel.

      It is this parallel nature where a FPGA would outperform a C64 emulator running on a device like a Raspberry Pi.If you add more and more functionality to your FPGA emulator, you will see that the CPU execution speed will stay more or less the same.

      Well, hope you have a great weekend.


  7. Hi Johan, One more question, am I correct you use Verilog (instead of VHDL) for building your C64 setup? If so what motivate you to choose Verilog?

    I'm following the FPGA tutorials featured on (next to your blog my main go to site for learning FPGA :)) He has also an excellent learning section about Verilog / VHDL.

    My end goal is to run C64 Basic (just like you did) on a own home brew kit (e.g. using Lattice ECP5-25 FPGA), so I'm eager to use the same language you used.

    All the best, Jeroen

    1. Hi Joena

      In my C64 setup I am indeed using Verilog. However, I agree it is probably better to use VHDL since it provides btter Type Saftey, encapsulated types and so on.

      The reason for me to currently stick to Verilog, is the general learning curve of FPGA programming. Verilog is simpler and is just easier to read.

      Personally I just feel Verilog eases the process if you want to go through lots of examples, without worrying to simultaneously getting familiar with all the language constructs of VHDL.

      I guess this depends all on personal preference as well as what you want to achieve.

      Kind Regards

    2. Thx for your swift reply Johan :) :)